Here is a brief summary of how to invoke as. For details, see Command-Line Options.
as [-a[cdghlns][=file]] [--alternate] [-D]
[--compress-debug-sections] [--nocompress-debug-sections]
[--debug-prefix-map old=new]
[--defsym sym=val] [-f] [-g] [--gstabs]
[--gstabs+] [--gdwarf-2] [--gdwarf-sections]
[--help] [-I dir] [-J]
[-K] [-L] [--listing-lhs-width=NUM]
[--listing-lhs-width2=NUM] [--listing-rhs-width=NUM]
[--listing-cont-lines=NUM] [--keep-locals]
[--no-pad-sections]
[-o objfile] [-R]
[--hash-size=NUM] [--reduce-memory-overheads]
[--statistics]
[-v] [-version] [--version]
[-W] [--warn] [--fatal-warnings] [-w] [-x]
[-Z] [@FILE]
[--sectname-subst] [--size-check=[error|warning]]
[--elf-stt-common=[no|yes]]
[--generate-missing-build-notes=[no|yes]]
[--target-help] [target-options]
[--|files ...]
Target AArch64 options:
[-EB|-EL]
[-mabi=ABI]
Target Alpha options:
[-mcpu]
[-mdebug | -no-mdebug]
[-replace | -noreplace]
[-relax] [-g] [-Gsize]
[-F] [-32addr]
Target ARC options:
[-mcpu=cpu]
[-mA6|-mARC600|-mARC601|-mA7|-mARC700|-mEM|-mHS]
[-mcode-density]
[-mrelax]
[-EB|-EL]
Target ARM options:
[-mcpu=processor[+extension...]]
[-march=architecture[+extension...]]
[-mfpu=floating-point-format]
[-mfloat-abi=abi]
[-meabi=ver]
[-mthumb]
[-EB|-EL]
[-mapcs-32|-mapcs-26|-mapcs-float|
-mapcs-reentrant]
[-mthumb-interwork] [-k]
Target Blackfin options:
[-mcpu=processor[-sirevision]]
[-mfdpic]
[-mno-fdpic]
[-mnopic]
Target CRIS options:
[--underscore | --no-underscore]
[--pic] [-N]
[--emulation=criself | --emulation=crisaout]
[--march=v0_v10 | --march=v10 | --march=v32 | --march=common_v10_v32]
Target C-SKY options:
[-march=arch] [-mcpu=cpu]
[-EL] [-mlittle-endian] [-EB] [-mbig-endian]
[-fpic] [-pic]
[-mljump] [-mno-ljump]
[-force2bsr] [-mforce2bsr] [-no-force2bsr] [-mno-force2bsr]
[-jsri2bsr] [-mjsri2bsr] [-no-jsri2bsr ] [-mno-jsri2bsr]
[-mnolrw ] [-mno-lrw]
[-melrw] [-mno-elrw]
[-mlaf ] [-mliterals-after-func]
[-mno-laf] [-mno-literals-after-func]
[-mlabr] [-mliterals-after-br]
[-mno-labr] [-mnoliterals-after-br]
[-mistack] [-mno-istack]
[-mhard-float] [-mmp] [-mcp] [-mcache]
[-msecurity] [-mtrust]
[-mdsp] [-medsp] [-mvdsp]
Target D10V options:
[-O]
Target D30V options:
[-O|-n|-N]
Target EPIPHANY options:
[-mepiphany|-mepiphany16]
Target H8/300 options:
[-h-tick-hex]
Target i386 options:
[--32|--x32|--64] [-n]
[-march=CPU[+EXTENSION...]] [-mtune=CPU]
Target IA-64 options:
[-mconstant-gp|-mauto-pic]
[-milp32|-milp64|-mlp64|-mp64]
[-mle|mbe]
[-mtune=itanium1|-mtune=itanium2]
[-munwind-check=warning|-munwind-check=error]
[-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
[-x|-xexplicit] [-xauto] [-xdebug]
Target IP2K options:
[-mip2022|-mip2022ext]
Target M32C options:
[-m32c|-m16c] [-relax] [-h-tick-hex]
Target M32R options:
[--m32rx|--[no-]warn-explicit-parallel-conflicts|
--W[n]p]
Target M680X0 options:
[-l] [-m68000|-m68010|-m68020|...]
Target M68HC11 options:
[-m68hc11|-m68hc12|-m68hcs12|-mm9s12x|-mm9s12xg]
[-mshort|-mlong]
[-mshort-double|-mlong-double]
[--force-long-branches] [--short-branches]
[--strict-direct-mode] [--print-insn-syntax]
[--print-opcodes] [--generate-example]
Target MCORE options:
[-jsri2bsr] [-sifilter] [-relax]
[-mcpu=[210|340]]
Target Meta options:
[-mcpu=cpu] [-mfpu=cpu] [-mdsp=cpu]
Target MICROBLAZE options:
Target MIPS options:
[-nocpp] [-EL] [-EB] [-O[optimization level]]
[-g[debug level]] [-G num] [-KPIC] [-call_shared]
[-non_shared] [-xgot [-mvxworks-pic]
[-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
[-mfp64] [-mgp64] [-mfpxx]
[-modd-spreg] [-mno-odd-spreg]
[-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
[-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
[-mips32r3] [-mips32r5] [-mips32r6] [-mips64] [-mips64r2]
[-mips64r3] [-mips64r5] [-mips64r6]
[-construct-floats] [-no-construct-floats]
[-mignore-branch-isa] [-mno-ignore-branch-isa]
[-mnan=encoding]
[-trap] [-no-break] [-break] [-no-trap]
[-mips16] [-no-mips16]
[-mmips16e2] [-mno-mips16e2]
[-mmicromips] [-mno-micromips]
[-msmartmips] [-mno-smartmips]
[-mips3d] [-no-mips3d]
[-mdmx] [-no-mdmx]
[-mdsp] [-mno-dsp]
[-mdspr2] [-mno-dspr2]
[-mdspr3] [-mno-dspr3]
[-mmsa] [-mno-msa]
[-mxpa] [-mno-xpa]
[-mmt] [-mno-mt]
[-mmcu] [-mno-mcu]
[-mcrc] [-mno-crc]
[-mginv] [-mno-ginv]
[-mloongson-mmi] [-mno-loongson-mmi]
[-mloongson-cam] [-mno-loongson-cam]
[-mloongson-ext] [-mno-loongson-ext]
[-mloongson-ext2] [-mno-loongson-ext2]
[-minsn32] [-mno-insn32]
[-mfix7000] [-mno-fix7000]
[-mfix-rm7000] [-mno-fix-rm7000]
[-mfix-vr4120] [-mno-fix-vr4120]
[-mfix-vr4130] [-mno-fix-vr4130]
[-mfix-r5900] [-mno-fix-r5900]
[-mdebug] [-no-mdebug]
[-mpdr] [-mno-pdr]
Target MMIX options:
[--fixed-special-register-names] [--globalize-symbols]
[--gnu-syntax] [--relax] [--no-predefined-symbols]
[--no-expand] [--no-merge-gregs] [-x]
[--linker-allocated-gregs]
Target Nios II options:
[-relax-all] [-relax-section] [-no-relax]
[-EB] [-EL]
Target NDS32 options:
[-EL] [-EB] [-O] [-Os] [-mcpu=cpu]
[-misa=isa] [-mabi=abi] [-mall-ext]
[-m[no-]16-bit] [-m[no-]perf-ext] [-m[no-]perf2-ext]
[-m[no-]string-ext] [-m[no-]dsp-ext] [-m[no-]mac] [-m[no-]div]
[-m[no-]audio-isa-ext] [-m[no-]fpu-sp-ext] [-m[no-]fpu-dp-ext]
[-m[no-]fpu-fma] [-mfpu-freg=FREG] [-mreduced-regs]
[-mfull-regs] [-m[no-]dx-regs] [-mpic] [-mno-relax]
[-mb2bb]
Target PDP11 options:
[-mpic|-mno-pic] [-mall] [-mno-extensions]
[-mextension|-mno-extension]
[-mcpu] [-mmachine]
Target picoJava options:
[-mb|-me]
Target PowerPC options:
[-a32|-a64]
[-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405|
-m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mgekko|
-mbroadway|-mppc64|-m620|-me500|-e500x2|-me500mc|-me500mc64|-me5500|
-me6500|-mppc64bridge|-mbooke|-mpower4|-mpwr4|-mpower5|-mpwr5|-mpwr5x|
-mpower6|-mpwr6|-mpower7|-mpwr7|-mpower8|-mpwr8|-mpower9|-mpwr9-ma2|
-mcell|-mspe|-mspe2|-mtitan|-me300|-mcom]
[-many] [-maltivec|-mvsx|-mhtm|-mvle]
[-mregnames|-mno-regnames]
[-mrelocatable|-mrelocatable-lib|-K PIC] [-memb]
[-mlittle|-mlittle-endian|-le|-mbig|-mbig-endian|-be]
[-msolaris|-mno-solaris]
[-nops=count]
Target PRU options:
[-link-relax]
[-mnolink-relax]
[-mno-warn-regname-label]
Target RISC-V options:
[-fpic|-fPIC|-fno-pic]
[-march=ISA]
[-mabi=ABI]
Target RL78 options:
[-mg10]
[-m32bit-doubles|-m64bit-doubles]
Target RX options:
[-mlittle-endian|-mbig-endian]
[-m32bit-doubles|-m64bit-doubles]
[-muse-conventional-section-names]
[-msmall-data-limit]
[-mpid]
[-mrelax]
[-mint-register=number]
[-mgcc-abi|-mrx-abi]
Target s390 options:
[-m31|-m64] [-mesa|-mzarch] [-march=CPU]
[-mregnames|-mno-regnames]
[-mwarn-areg-zero]
Target SCORE options:
[-EB][-EL][-FIXDD][-NWARN]
[-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
[-march=score7][-march=score3]
[-USE_R1][-KPIC][-O0][-G num][-V]
Target SPARC options:
[-Av6|-Av7|-Av8|-Aleon|-Asparclet|-Asparclite
-Av8plus|-Av8plusa|-Av8plusb|-Av8plusc|-Av8plusd
-Av8plusv|-Av8plusm|-Av9|-Av9a|-Av9b|-Av9c
-Av9d|-Av9e|-Av9v|-Av9m|-Asparc|-Asparcvis
-Asparcvis2|-Asparcfmaf|-Asparcima|-Asparcvis3
-Asparcvisr|-Asparc5]
[-xarch=v8plus|-xarch=v8plusa]|-xarch=v8plusb|-xarch=v8plusc
-xarch=v8plusd|-xarch=v8plusv|-xarch=v8plusm|-xarch=v9
-xarch=v9a|-xarch=v9b|-xarch=v9c|-xarch=v9d|-xarch=v9e
-xarch=v9v|-xarch=v9m|-xarch=sparc|-xarch=sparcvis
-xarch=sparcvis2|-xarch=sparcfmaf|-xarch=sparcima
-xarch=sparcvis3|-xarch=sparcvisr|-xarch=sparc5
-bump]
[-32|-64]
[--enforce-aligned-data][--dcti-couples-detect]
Target TIC54X options:
[-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
[-merrors-to-file <filename>|-me <filename>]
Target TIC6X options:
[-march=arch] [-mbig-endian|-mlittle-endian]
[-mdsbt|-mno-dsbt] [-mpid=no|-mpid=near|-mpid=far]
[-mpic|-mno-pic]
Target TILE-Gx options:
[-m32|-m64][-EB][-EL]
Target Visium options:
[-mtune=arch]
Target Xtensa options:
[--[no-]text-section-literals] [--[no-]auto-litpools]
[--[no-]absolute-literals]
[--[no-]target-align] [--[no-]longcalls]
[--[no-]transform]
[--rename-section oldname=newname]
[--[no-]trampolines]
Target Z80 options:
[-z80] [-r800]
[ -ignore-undocumented-instructions] [-Wnud]
[ -ignore-unportable-instructions] [-Wnup]
[ -warn-undocumented-instructions] [-Wud]
[ -warn-unportable-instructions] [-Wup]
[ -forbid-undocumented-instructions] [-Fud]
[ -forbid-unportable-instructions] [-Fup]
@fileOptions in file are separated by whitespace. A whitespace
character may be included in an option by surrounding the entire
option in either single or double quotes. Any character (including a
backslash) may be included by prefixing the character to be included
with a backslash. The file may itself contain additional
@file options; any such options will be processed recursively.
-a[cdghlmns]-ac-ad-ag-ah-al-am-an-as=fileYou may combine these options; for example, use ‘-aln’ for assembly
listing without forms processing. The ‘=file’ option, if used, must be
the last one. By itself, ‘-a’ defaults to ‘-ahls’.
--alternate.altmacro.
--compress-debug-sections--compress-debug-sections=none--compress-debug-sections=zlib--compress-debug-sections=zlib-gnu--compress-debug-sections=zlib-gabi--nocompress-debug-sections-D--debug-prefix-map old=new--defsym sym=value.set pseudo-op.
-f-g--gen-debug--gstabs--gstabs+--gdwarf-2--gdwarf-sections--size-check=error--size-check=warning--elf-stt-common=no--elf-stt-common=yesSTT_COMMON type. The default can be controlled
by a configure option --enable-elf-stt-common.
--generate-missing-build-notes=yes--generate-missing-build-notes=no--help--target-help-I dir.include directives.
-J-K-L--keep-locals--listing-lhs-width=number--listing-lhs-width2=number--listing-rhs-width=number--listing-cont-lines=number--no-pad-sections-o objfile-R--hash-size=number--reduce-memory-overheads--sectname-subst.section name.
--statistics--strip-local-absolute-v-version--version-W--no-warn--fatal-warnings--warn-w-x-Z-- | files ...See AArch64 Options, for the options available when as is configured for the 64-bit mode of the ARM Architecture (AArch64).
See Alpha Options, for the options available when as is configured for an Alpha processor.
The following options are available when as is configured for an ARC processor.
-mcpu=cpu-EB | -EL-mcode-densityThe following options are available when as is configured for the ARM processor family.
-mcpu=processor[+extension...]-march=architecture[+extension...]-mfpu=floating-point-format-mfloat-abi=abi-mthumb-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant-EB | -EL-mthumb-interwork-mccs-kSee Blackfin Options, for the options available when as is configured for the Blackfin processor family.
See the info pages for documentation of the CRIS-specific options.
See C-SKY Options, for the options available when as is configured for the C-SKY processor family.
The following options are available when as is configured for a D10V processor.
-OThe following options are available when as is configured for a D30V processor.
-O-n-NThe following options are available when as is configured for the Adapteva EPIPHANY series.
See Epiphany Options, for the options available when as is configured for an Epiphany processor.
See i386-Options, for the options available when as is configured for an i386 processor.
The following options are available when as is configured for the Ubicom IP2K series.
-mip2022ext-mip2022The following options are available when as is configured for the Renesas M32C and M16C processors.
-m32c-m16c-relax-h-tick-hexThe following options are available when as is configured for the Renesas M32R (formerly Mitsubishi M32R) series.
--m32rx--warn-explicit-parallel-conflicts or --Wp--no-warn-explicit-parallel-conflicts or --WnpThe following options are available when as is configured for the Motorola 68000 series.
-l-m68000 | -m68008 | -m68010 | -m68020 | -m68030| -m68040 | -m68060 | -m68302 | -m68331 | -m68332| -m68333 | -m68340 | -mcpu32 | -m5200-m68881 | -m68882 | -mno-68881 | -mno-68882-m68851 | -mno-68851See Nios II Options, for the options available when as is configured for an Altera Nios II processor.
For details about the PDP-11 machine dependent features options, see PDP-11-Options.
-mpic | -mno-pic-mall-mall-extensions-mno-extensions-mextension | -mno-extension-mcpu-mmachineThe following options are available when as is configured for a picoJava processor.
See PRU Options, for the options available when as is configured for a PRU processor.
The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.
-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg--xgate-ramoffset-mshort-mlong-mshort-double-mlong-double--force-long-branches-S | --short-branches--strict-direct-mode--print-insn-syntax--print-opcodes--generate-exampleThe following options are available when as is configured for the SPARC architecture:
-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite-Av8plus | -Av8plusa | -Av9 | -Av9a‘-Av8plus’ and ‘-Av8plusa’ select a 32 bit environment. ‘-Av9’ and ‘-Av9a’ select a 64 bit environment.
‘-Av8plusa’ and ‘-Av9a’ enable the SPARC V9 instruction set with
UltraSPARC extensions.
-xarch=v8plus | -xarch=v8plusa-bumpThe following options are available when as is configured for the 'c54x architecture.
-mfar-mode-mcpu=CPU_VERSION-merrors-to-file FILENAMEThe following options are available when as is configured for a MIPS processor.
-G numgp register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
-EB-EL-mips1-mips2-mips3-mips4-mips5-mips32-mips32r2-mips32r3-mips32r5-mips32r6-mips64-mips64r2-mips64r3-mips64r5-mips64r6-march=cpu-mtune=cpu-mfix7000-mno-fix7000-mfix-rm7000-mno-fix-rm7000-mfix-r5900-mno-fix-r5900nop instruction there
instead. The short loop bug under certain conditions causes loops to
execute only once or twice, due to a hardware bug in the R5900 chip.
-mdebug-no-mdebug-mpdr-mno-pdr.pdr sections.
-mgp32-mfp32-mgp64-mfp64-mfpxx-modd-spreg-mno-odd-spreg-mips16-no-mips16.module mips16 at the start of the assembly file. ‘-no-mips16’
turns off this option.
-mmips16e2-mno-mips16e2.module mips16e2 at the start of the assembly file.
‘-mno-mips16e2’ turns off this option.
-mmicromips-mno-micromips.module micromips at the start of the assembly file.
‘-mno-micromips’ turns off this option. This is equivalent to putting
.module nomicromips at the start of the assembly file.
-msmartmips-mno-smartmips.module smartmips at the start of the assembly
file. ‘-mno-smartmips’ turns off this option.
-mips3d-no-mips3d-mdmx-no-mdmx-mdsp-mno-dsp-mdspr2-mno-dspr2-mdspr3-mno-dspr3-mmsa-mno-msa-mxpa-mno-xpa-mmt-mno-mt-mmcu-mno-mcu-mcrc-mno-crc-mginv-mno-ginv-mloongson-mmi-mno-loongson-mmi-mloongson-cam-mno-loongson-cam-mloongson-ext-mno-loongson-ext-mloongson-ext2-mno-loongson-ext2-minsn32-mno-insn32.set insn32 at
the start of the assembly file. ‘-mno-insn32’ turns off this
option. This is equivalent to putting .set noinsn32 at the
start of the assembly file. By default ‘-mno-insn32’ is
selected, allowing all instructions to be used.
--construct-floats--no-construct-floats--relax-branch--no-relax-branch-mignore-branch-isa-mno-ignore-branch-isa-mnan=encoding--emulation=nameThe available configuration names are: ‘mipself’, ‘mipslelf’ and
‘mipsbelf’. Choosing ‘mipself’ now has no effect, since the output
is always ELF. ‘mipslelf’ and ‘mipsbelf’ select little- and
big-endian output respectively, but ‘-EL’ and ‘-EB’ are now the
preferred options instead.
-nocpp--trap--no-trap--break--no-break-nThe following options are available when as is configured for an MCore processor.
-jsri2bsr-nojsri2bsr-sifilter-nosifilter-relax-mcpu=[210|340]-EB-ELSee Meta Options, for the options available when as is configured for a Meta processor.
See the info pages for documentation of the MMIX-specific options.
See NDS32 Options, for the options available when as is configured for a NDS32 processor.
See PowerPC-Opts, for the options available when as is configured for a PowerPC processor.
See RISC-V-Options, for the options available when as is configured for a RISC-V processor.
See the info pages for documentation of the RX-specific options.
The following options are available when as is configured for the s390 processor family.
-m31-m64-mesa-mzarch-march=processor-mregnames-mno-regnames-mwarn-areg-zeroSee TIC6X Options, for the options available when as is configured for a TMS320C6000 processor.
See TILE-Gx Options, for the options available when as is configured for a TILE-Gx processor.
See Visium Options, for the options available when as is configured for a Visium processor.
See Xtensa Options, for the options available when as is configured for an Xtensa processor.
The following options are available when as is configured for a Z80 family processor.
-z80-r800-ignore-undocumented-instructions-Wnud-ignore-unportable-instructions-Wnup-warn-undocumented-instructions-Wud-warn-unportable-instructions-Wup-forbid-undocumented-instructions-Fud-forbid-unportable-instructions-Fup