Synopsys ARC Processors¶
ARC Classic¶
Synopsys ARC Classic processors are represented by three generations of Instruction Set Architectures (ISA). Each ISA consists of one or more processor families with different microarchitectures. All cores may be configured to support little or big endianness. All families except ARC EM and ARC 600 families may be configured to support running complex operation systems like Linux.
Here is a list of ARC processor families:
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ARCompact ISA (also known as ARCv1 ISA):
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ARCv2 ISA:
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ARCv3 ISA:
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ARC VPX DSP Processors (not supported by GNU toolchain)
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ARC NPX Neural Processing Unit (not supported by GNU toolchain)
You can find programmer's reference manuals and datasheets for each core on corresponding web pages.
ARC-V¶
The Synopsys ARC-V processors leverage the proven microarchitecture of the existing ARC processor offerings, while giving customers access to the expanding RISC-V ecosystem. The Synopsys ARC-V portfolio, based on the RISC-V ISA, includes high-performance, mid-range, and ultra-low power families, as well as functional safety (FS) versions, to address a broad range of application workloads.
ARC-V RMX-100 and RMX-500 Series¶
The 32-bit ARC-V RMX series includes the three-stage-pipeline RMX-100 and the five-stage-pipeline RMX-500 processors, which are optimized for ultra-low power embedded applications. The processors offer optional DSP support for greater signal processing efficiency. The RMX-100 processor offers support for ISO 26262 functional-safety compliance (QM and ASIL-D), and the RMX-500 processor offers support for functional-safety compliance (QM, ASIL-D, ASIL-B, and hybrid mode), as well as ISO 21434 cybersecurity compliance.
More information is available on the Synopsys website:
- Power-Efficient RISC-V Processors for Embedded Applications
- Synopsys ARC-V RMX-100 Processor IP
- Synopsys ARC-V RMX-500 Processor IP
ARC-V RHX Series¶
The 32-bit ARC-V RHX-100 series consists of superscalar, single-core and multicore processors optimized for efficient real-time applications. It includes support for coherent accelerators and real-time hardware virtualization as well as optional RVV extensions (RHX-100V/105V). For safety-critical applications, the RHX-100 series offers functional-safety-compliant versions of all the processors in the series.
More information is available on the Synopsys website:
ARC-V RPX Processors¶
The 64-bit ARC-V RPX-100 series consists of multicore processors with 64-bit RISC-V defined profile support for both user and supervisor modes. The multicore ARC-V RPX-105 supports SMP Linux and shared L3 cache. It offers configurations up to 16 cores and is optimized for efficient host processing performance for a variety of applications. The RPX-100 series also offers functional-safety- compliant versions of its processors.
More information is available on the Synopsys website: